%0 Journal Article
%T Design and power analysis of 4×4 semiconductor ROM array with row decoder and column decoder at 32, 22 and 16nm channel length of MOS transistor
%A Bari, Surajit
%A Bhowmik, Sonali
%A De, Debashis
%A Sarkar, Angsuman
%J Microsystem Technologies
%V 23
%N 9
%P 4237-4243
%@ 0946-7076
%D 2016-02-18
%I Springer Berlin Heidelberg
%~ DeepDyve