%0 Journal Article %T Layout-aware simulation of soft errors in sub-100 nm integrated circuits %A Balbekov, A. %A Gorbunov, M. %A Bobkov, S. %J Proceedings of SPIE %V 10224 %P 1022418-1022418-6 %@ 0277-786X %D 2016-12-30 %I SPIE %~ DeepDyve