%0 Journal Article
%T Chip level lithography verification system with artificial neural networks
%A Shin, Jae-pil
%A Lee, Jee-hyong
%A Yoo, Moon-hyun
%J Proceedings of SPIE
%V 5853
%N 1
%P 124-130
%@ 0277-786X
%D 2005-06-28
%I SPIE
%~ DeepDyve