%0 Journal Article
%T A 70.7-dB SNDR 100-kS/s 14-b SAR ADC with attenuation capacitance calibration in 0.35-µm CMOS
%A Brenna, Stefano
%A Bonfanti, Andrea
%A Lacaita, Andrea
%J Analog Integrated Circuits and Signal Processing
%V 89
%N 2
%P 357-371
%@ 0925-1030
%D 2016-08-20
%I Springer US
%~ DeepDyve