%0 Journal Article
%T Measuring Method for TSV-based Interconnect Resistance in 3D-SIC by Embedded Analog Boundary-Scan Circuit
%A Kameyama, Shuichi
%A Baba, Masayuki
%A Higami, Yoshinobu
%A Takahashi, Hiroshi
%A ,
%J Transactions of The Japan Institute of Electronics Packaging
%@ 1883-3365
%D 2014-01-01
%I Japan Institute of Electronics Packaging
%~ DeepDyve