%0 Journal Article
%T Input/output Buffer based Vedic Multiplier Design for Thermal Aware Energy Efficient Digital Signal Processing on 28nm FPGA
%A Goswami, Kavita
%A Pandey, Bishwajeet
%A Hussaian, D. M. Akbar
%A Kumar, Tanesh
%A Kalia, Kartik
%A ,
%J Indian Journal of Science and Technology
%@ 0974-5645
%D 2016-03-23
%I Indian Society for Education and Environment
%~ DeepDyve