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This article presents a filter design approach and the efficiency analysis of a single-phase Neutral Point Clamped (NPC) three-level inverter with a combined LC trap and LCR filter system. The multilevel inverter system using NPC type inverter is suitable for high-power application. The...
An active clamp SEPIC converter with synchronous rectifier is presented to achieve zero voltage switching (ZVS). The active clamp circuit is adopted in the proposed converter to absorb the energy stored in the leakage inductance of the transformer and limit the peak voltage stress on the...
A new control technique is presented for the parallel connection of distributed generation inverters. The proposed control technique is based on a modification of the power angle droop control method, and uses only locally measured feedback signals. An improvement in transient response is...
A new method is proposed in this article to accomplish the fine tune unit of the digitally controlled oscillator of an all-digital phase-locked loop (ADPLL). Instead of using adjustable currents, we utilise the difference of the equivalent capacitance obtained from the drain of MOS transistors...
This article presents carrier-based modulation strategies for a neutral point clamped inverter that substantially reduces harmonics in the output line to line voltages, phase voltages, reference voltages and common mode voltage. A graphical technique that has already been proposed in the...
A novel CMOS exponential transconductor which employs only three NMOS transistors operating in weak inversion, is presented. The main advantage of the proposed circuit is its wide range of exponential behaviour, which reaches up to five decades of current range, and above 10 μA to an input...
A 2.2-V positive variable CMOS transconductor designed in a low-cost 0.35 μm CMOS digital process intended for wideband applications is presented. The cell achieves in worst cases 1.5 mS, 2 GHz and a total noise contribution of 1.45 μA rms . The circuit presents high linearity, thanks to the...
In this study, we show that floating gate MOS (metal oxide semiconductor) transistors support a low-voltage and low-power variable analogue differential delay line circuit for signals in the audio frequency range. The delay time is dependent and accomplished by a variable bias voltage. Attention...
Large signal analysis of mixers excited by three tone signals is presented. The special case of two equal-amplitude sinusoids plus a difference-frequency injection is considered in detail and the results are compared, whenever possible, with previously published results. Contrary to previously...
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