Electronics

Sun, Rui;Zhang, Zhaoli;Liu, Hai

doi: 10.3390/electronics14061057pmid: N/A

Given the critical requirements for both speed and accuracy in facial expression recognition, this paper presents a novel deep-learning architecture named Fast Central Consistency Attention (FCCA). With FasterNet-s as its backbone network, FCCA is designed to recognize facial expressions. Firstly, we leverage partial convolution to extract features from specific channels, thereby reducing frequent memory access and substantially boosting training speed. Secondly, we enhance recognition accuracy by introducing an additional pointwise convolution on the partial features, focusing on the central facial position using weighted mechanisms. Lastly, we integrate flip consistency loss to tackle uncertainty challenges inherent in facial expression recognition (FER) tasks, further improving the overall model performance. Our approach yielded superior results: we achieved recognition accuracies of 91.30% on RAF-DB and 65.51% on AffectNet datasets, along with 56.61% UAR and 69.66% WAR on the DFEW dataset. The FCCA method has demonstrated state-of-the-art performance across multiple datasets, underscoring its robustness and capability for generalization.

Sun, Xiaoming;Li, Shilin;Chen, Yongji;Chen, Junxia;Geng, Hao;Sun, Kun;Zhu, Yuemin;Su, Bochao;Zhang, Hu

doi: 10.3390/electronics14061058pmid: N/A

Nucleus accurate segmentation is a crucial task in biomedical image analysis. While convolutional neural networks (CNNs) have achieved notable progress in this field, challenges remain due to the complexity and heterogeneity of cell images, especially in overlapping regions of nuclei. To address the limitations of current methods, we propose a mechanism of multiple differential convolution and local-variation attention in CNNs, leading to the so-called multiple differential convolution and local-variation attention U-Net (MDLA-UNet). The multiple differential convolution employs multiple differential operators to capture gradient and direction information, improving the network’s capability to detect edges. The local-variation attention utilizes Haar discrete wavelet transforms for level-1 decomposition to obtain approximate features, and then derives high-frequency features to enhance the global context and local detail variation of the feature maps. The results on the MoNuSeg, TNBC, and CryoNuSeg datasets demonstrated superior segmentation performance of the proposed method for cells having complex boundaries and details with respect to existing methods. The proposed MDLA-UNet presents the ability of capturing fine edges and details in feature maps and thus improves the segmentation of nuclei with blurred boundaries and overlapping regions.

Blanco-Ortiz, Juan;García-Martínez, Eduardo;González-Prieto, Ignacio;Duran, Mario J.

doi: 10.3390/electronics14061059pmid: N/A

Solid-State Transformers (SSTs) enable significant improvements in size and functionality compared to conventional power transformers. However, one of the key challenges in Solid-State Transformer design is achieving reliable insulation between the high-voltage and low-voltage sections. This proposal presents the design and optimization of a high-insulation Medium-Frequency Transformer (MFT) for 66 kV grids operating at 50 kHz and delivering up to 75 kW for SST applications using Inductive Power Transfer (IPT) technology. A fixed 50 mm gap between the primary and secondary windings is filled with dielectric oil to enhance insulation. The proposed IPT system employs a double-D coil design developed through iterative 2D and 3D finite element method simulations to optimize the magnetic circuit, thereby significantly reducing stray flux and losses. Notably, the double-D configuration reduces enclosure losses from 269.6 W, observed in a rectangular coil design, to 4.38 W, resulting in an overall system loss reduction of 42.4% while maintaining the electrical parameters required for zero-voltage switching operation. These advancements address the critical limitations in conventional Medium-Frequency Transformers by providing enhanced insulation and improved thermal management. The proposed IPT-based design offers a low-loss solution with easy thermal management for solid-state transformer applications in high-voltage grids.

Flórez Rodríguez, Juan J.;Herrán, Luis F.

doi: 10.3390/electronics14061060pmid: N/A

This work examines the feasibility of designing an impedance synthesis network based on a double-ridge waveguide (DRW). This design is based on the concept of the stepped-impedance line transformer as a cascade of transmission lines with different characteristic impedances, but using, in this particular case, a stepped-ridge waveguide. It is shown that this structure is able to synthesize not only real impedances but an arbitrary impedance, following some restrictions explained in this paper. An impedance synthesis network based on DRW can have numerous applications, like being used in designing amplifiers, which would eventually make possible to integrate amplifiers in waveguide technology.

Alharbi, Saleh S.;Alharbi, Salah S.;Bubshait, Abdullah;Alharbi, Hisham;Alateeq, Abdulaziz

doi: 10.3390/electronics14061061pmid: N/A

With power demands continuously growing, the penetration of renewable energy resources, particularly solar photovoltaic (PV) systems, across the residential sector has been extensive. A voltage source inverter (VSI) is the key element for efficiently processing energy conversion and connecting PV systems to home loads or utility grids. The operation of this inverter relies heavily on power-switching devices, which suffer from larger power losses due to the conventional semiconductors used based on silicon (Si) material. The new materials of wide bandgap (WBG) semiconductors, for example, gallium nitride (GaN) and silicon carbide (SiC), provide remarkably distinct characteristics of semiconductor devices to minimize power loss and boost the inverter’s operational capabilities. This research paper assesses the effects of integrating SiC-MOSFET devices into VSIs in order to improve the switching behavior and efficiency level. An experimental double-pulse testing (DPT) circuit was configured and set up for investigating the switching characterization of SiC-MOSFETs compared to the widely used Si-IGBTs. Under various operating circumstances, the switching behavior of two different types of power transistors was tested while their turning-on and turning-off losses were measured. The VSI based on SiC and Si transistors was simulated to examine the performance of the inverter. The results reveal that incorporating SiC-MOSFETs into the VSI substantially enhances the switching operation and reduces total power losses while increasing the efficiency compared to the inverter based on Si-IGBTs.

Kiyama, Masato;Amagasaki, Motoki;Okamoto, Toshiaki

doi: 10.3390/electronics14061062pmid: N/A

With increasing incidents due to congestion at events, effective pedestrian guidance has become a critical safety concern. Recent research has explored the application of reinforcement learning to crowd simulation, where agents learn optimal actions through trial and error to maximize rewards based on environmental states. This study investigates the use of reinforcement learning and simulation techniques to mitigate pedestrian congestion through improved guidance systems. We employ the Multi-Agent Deep Deterministic Policy Gradient (MA-DDPG), a multi-agent reinforcement learning approach, and propose an enhanced method for learning the Q-function for actors within the MA-DDPG framework. Using the Mojiko Fireworks Festival dataset as a case study, we evaluated the effectiveness of our proposed method by comparing congestion levels with existing approaches. The results demonstrate that our method successfully reduces congestion, with agents exhibiting superior cooperation in managing crowd flow. This improvement in agent coordination suggests the potential for practical applications in real-world crowd management scenarios.

Guerrero-Vásquez, Luis Fernando;Chacón-Reino, Nathalia Alexandra;Sigüenza-Jiménez, Byron Steven;Zeas-Loja, Felipe Tomas;Ordoñez-Ordoñez, Jorge Osmani;Chasi-Pesantez, Paúl Andrés

doi: 10.3390/electronics14061063pmid: N/A

This systematic literature review investigates microstrip antenna applications in image acquisition, focusing on their design characteristics, reconstruction algorithms, and application areas. We applied the PRISMA methodology for article selection. From selected studies, classifications were identified based on antenna patch geometry, substrate types, and image reconstruction algorithms. According to inclusion criteria, a significant increase in publications on this topic has been observed since 2013. Considering this trend, our study focuses on a 10-year publication range, including articles up to 2023. Results indicate that medical applications, particularly breast cancer detection, dominate this field. However, emerging areas are gaining attention, including stroke detection, bone fracture monitoring, security surveillance, avalanche radars, and weather monitoring. Our study highlights the need for more efficient algorithms, system miniaturization, and improved models to achieve precise medical imaging. Visual tools such as heatmaps and box plots are used to provide a deeper analysis, identify knowledge gaps, and offer valuable insights for future research and development in this versatile technology.

Liu, Yingzhe;Fu, Fangfa;Sun, Xuejian

doi: 10.3390/electronics14061064pmid: N/A

In the post-Moore era, the excessive amount of information brings great challenges to the performance of computing systems. To cope with these challenges, approximate computation has developed rapidly, which enhances the system performance with minor degradation in accuracy. In this paper, we investigate the utilization of an Artificial Intelligence of Things (AIoT) processor for approximate computing. Firstly, we employed neural architecture search (NAS) to acquire the neural network structure for approximate computation, which approximates the functions of FFT, DCT, FIR, and IIR. Subsequently, based on this structure, we quantized and trained a neural network implemented on the AI accelerator of the MAX78000 development board. To evaluate the performance, we implemented the same functions using the CMSIS-DSP library. The results demonstrate that the computational efficiency of the approximate computation on the AI accelerator is significantly higher compared to traditional DSP implementations. Therefore, the approximate computation based on AIoT devices can be effectively utilized in real-time applications.

Zhang, Jingyuan;Liu, Cheng;Chen, Siyu;Zhang, Lianpeng

doi: 10.3390/electronics14061065pmid: N/A

An improved super-twisting sliding mode and linear active disturbance rejection control strategy is proposed to improve the dynamic response performance and immunity performance in switched reluctance motor speed control systems. Firstly, the linear extended state observer in linear active disturbance rejection control is improved by using the super-twisting sliding mode (STSM) control algorithm in order to improve the performance of the observer and thus enhance the controller’s immunity to disturbances. Secondly, the STSM control algorithm is used to replace the original linear state error feedback control law to improve the dynamic response performance of the controller, and the sigmoid function is used to replace the sign function in the STSM algorithm to further weaken the inherent chattering of the sliding mode and improve the stability of the system. Finally, the proposed control strategy is verified using the MATLAB/Simulink simulation platform. The simulation results show that the proposed control strategy has a better dynamic response and disturbance immunity performance.

Ngo, Dat;Ahn, Suhun;Son, Jeonghyeon;Kang, Bongsoon

doi: 10.3390/electronics14061066pmid: N/A

Pattern recognition applications involve extensive arithmetic operations, including additions, multiplications, and divisions. When implemented on resource-constrained edge devices, these operations demand dedicated hardware, with division being the most complex. Conventional hardware dividers, however, incur substantial overhead in terms of resource consumption and latency. To address these limitations, we employ binary logarithms with regional error correction to approximate division operations. By leveraging approximation errors at boundary regions to formulate logarithm and antilogarithm offsets, our approach effectively reduces hardware complexity while minimizing the inherent errors of binary logarithm-based division. Additionally, we propose a six-stage pipelined hardware architecture, synthesized and validated on a Zynq UltraScale+ FPGA platform. The implementation results demonstrate that the proposed divider outperforms conventional division methods in terms of resource utilization and power savings. Furthermore, its application in image dehazing and object detection highlights its potential for real-time, high-performance computing systems.