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Select data courtesy of the U.S. National Library of Medicine.

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Microelectronics International

Subject:
Electrical and Electronic Engineering
Publisher:
Emerald Group Publishing Limited —
Emerald Publishing
ISSN:
1356-5362
Scimago Journal Rank:
22

2023

Volume 40
Issue 3 (Jun)Issue 2 (Mar)Issue 1 (Jan)

2022

Volume 39
Issue 4 (Oct)Issue 3 (Jun)Issue 2 (May)Issue 1 (Jan)

2021

Volume 38
Issue 4 (Oct)Issue 3 (Sep)Issue 2 (Aug)Issue 1 (Mar)

2020

Volume 37
Issue 4 (Sep)Issue 3 (Jun)Issue 2 (May)Issue 1 (Jan)

2019

Volume 36
Issue 4 (Oct)Issue 3 (Jul)Issue 2 (May)Issue 1 (Jan)

2018

Volume 35
Issue 4 (Oct)Issue 3 (Jul)Issue 2 (Apr)Issue 1 (Jan)

2016

Volume 33
Issue 3 (Aug)Issue 2 (May)Issue 1 (Jan)

2015

Volume 32
Issue 3 (Aug)Issue 2 (May)Issue 1 (Jan)

2014

Volume 31
Issue 3 (Jul)Issue 2 (Apr)

2013

Volume 31
Issue 1 (Dec)
Volume 30
Issue 3 (Jul)Issue 2 (Apr)Issue 1 (Jan)

2012

Volume 29
Issue 3 (Jul)Issue 2 (May)Issue 1 (Jan)

2011

Volume 28
Issue 3 (Aug)Issue 2 (May)Issue 1 (Jan)

2010

Volume 27
Issue 3 (Jan)Issue 2 (May)Issue 1 (Jan)

2009

Volume 26
Issue 3 (Jul)Issue 2 (May)Issue 1 (Jan)

2008

Volume 25
Issue 3 (Jul)Issue 2 (Apr)

2007

Volume 25
Issue 1 (Dec)
Volume 24
Issue 3 (Jul)Issue 2 (Apr)Issue 1 (Jan)

2006

Volume 23
Issue 3 (Sep)Issue 2 (May)Issue 1 (Jan)

2005

Volume 22
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

2004

Volume 21
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

2003

Volume 20
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

2002

Volume 19
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

2001

Volume 18
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

2000

Volume 17
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

1999

Volume 16
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

1998

Volume 15
Issue 3 (Dec)Issue 2 (Aug)Issue 1 (Apr)

1995

Volume 12
Issue 3 (Sep)Issue 2 (May)Issue 1 (Jan)

1994

Volume 11
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1993

Volume 10
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1992

Volume 9
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1991

Volume 8
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1990

Volume 7
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1989

Volume 6
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1988

Volume 5
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1987

Volume 4
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1986

Volume 3
Issue 3 (Mar)Issue 2 (Feb)Issue 1 (Jan)

1985

Volume 2
Issue 4 (Apr)Issue 3 (Mar)Issue 2 (Feb)

1984

Volume 2
Issue 1 (Feb)
Volume 1
Issue 4 (Jan)

1983

Volume 1
Issue 2 (Feb)

1982

Volume 1
Issue 1 (Jan)
journal article
LitStream Collection
Modelling and wave velocity calculation of multilayer structure SAW sensors

Dejan V. Tošić; Marija F. Hribšek

2011 Microelectronics International

doi: 10.1108/13565361111127296

Purpose – The purpose of this paper is to model multilayer structure surface acoustic wave (SAW) sensors, incorporated in CMOS or micro‐electro‐mechanical system integrated circuits, and to derive the corresponding wave velocity as an analytic expression in terms of the layers‘ thickness and density, which is suitable for analysis and design. Design/methodology/approach – The method is based on an electro‐mechanical equivalent model of multilayer structure SAW sensors. A multilayered SAW device is represented by a two‐port electrical equivalent circuit consisting of three parts: input transducer, output transducer, and between them the delay line, which is the sensing part. The sensing part is modelled as a mechanical two‐port network. The wave velocity is calculated using analogy between the mechanical and electrical quantities and the fact that the wave motion of the SAW extends below the surface to a depth of about one wavelength. Findings – The presented model predicts very efficiently and accurately the velocity of SAW sensors with multilayer substrates in the case where the thicknesses of upper layers are much smaller than the signal wavelength. The velocity can be calculated from the formula, so that elaborate numerical computations involving partial differential equations are avoided. Research limitations/implications – The model and the velocity calculation can be applied only to acoustically thin upper and middle layers where acoustically thin means that a layer is sufficiently thin and rigid (large shear modulus). The presented results provide a starting‐point for further research in the analysis and design of sensors fabricated using AlGaN, GaN, AlN/diamond. Practical implications – Since the majority of SAW sensors is designed with acoustically thin layers, the proposed model and calculation can be of interest for many practical material combinations. The presented model and calculation can be used in most cases of the optimal sensor design with respect to the sensor sensitivity or required area on the sensor chip. Originality/value – The paper presents a new original model of multilayer structure SAW sensors and a new method of SAW velocity calculation. The method gives good results, with much simpler calculations than in the wave equation method, in cases where certain layers are acoustically thin.
journal article
LitStream Collection
Overview and outlook of through‐silicon via (TSV) and 3D integrations

John H. Lau

2011 Microelectronics International

doi: 10.1108/13565361111127304

Purpose – The purpose of this paper is to focus on through‐silicon via (TSV), with a new concept that every chip or interposer could have two surfaces with circuits. Emphasis is placed on the 3D IC integration, especially the interposer (both active and passive) technologies and their roadmaps. The origin of 3D integration is also briefly presented. Design/methodology/approach – This design addresses the electronic packaging of 3D IC integration with a passive TSV interposer for high‐power, high‐performance, high pin‐count, ultra fine‐pitch, small real‐estate, and low‐cost applications. To achieve this, the design uses chip‐to‐chip interconnections through a passive TSV interposer in a 3D IC integration system‐in‐package (SiP) format with excellent thermal management. Findings – A generic, low‐cost and thermal‐enhanced 3D IC integration SiP with a passive interposer has been proposed for high‐performance applications. Also, the origin of 3D integration and the overview and outlook of 3D Si integration and 3D IC integration have been presented and discussed. Some important results and recommendations are summarized: the TSV/redistribution layer (RDL)/integrated passive devices passive interposer, which supports the high‐power chips on top and low‐power chips at its bottom, is the gut and workhorse of the current 3D IC integration design; with the passive interposer, it is not necessary to “dig” holes on the active chips. In fact, try to avoid making TSVs in the active chips; the passive interposer provides flexible coupling for whatever chips are available and/or necessary, and enhances the functionality and possibly the routings (shorter); with the passive interposer, the TSV manufacturing cost is lower because the requirement of TSV manufacturing yield is too high (>99.99 percent) for the active chips to bear additional costs due to TSV manufacturing yield loss; with the passive interposer, wafer thinning and thin‐wafer handling costs (for the interposer) are lower because these are not needed for the active chips and thus adds no cost due to yield loss; with the current designs, all the chips are bare; the packaging cost for individual chips is eliminated; more than 90 percent of heat from the 3D IC integration SiP is dissipated from the backside of high‐power chips using a thermal interface material and heat spreader/sink; the appearance and footprint of current 3D IC integration SiP designs are very attractive to integrated device manufactures, original equipment manufactures, and electronics manufacturing services (EMS) because they are standard packages; and underfills between the copper‐filled TSV interposer and the high‐ and low‐power chips are recommended to reduce creep damage of the lead‐free microbump solder joints and prolong their lives. Originality/value – The paper's findings will be very useful to the electronic industry.
journal article
LitStream Collection
Testing on dynamic behavior of PBGA assembly by considering fixed‐modes

Ping Yang; Zixia Chen

2011 Microelectronics International

doi: 10.1108/13565361111127313

Purpose – The purpose of this paper is to develop a systematic experimental investigation for testing dynamic behavior of plastic ball grid array (PBGA) integrity in electronic packaging and to investigate the dynamic behavior of PBGA assembly by considering fixed‐modes for design and reliability evaluation of PBGA packaging. Design/methodology/approach – A PBGA assembly prototype with different structure and material parameters is designed and manufactured. The modal distribution under excitation cycling can be tested by hammering test. The dynamic test about the PBGA assembly prototype can be implemented with different structure characteristics, materials parameters and fixed‐modes. To illustrate the validity of experimental test, the numerical simulation for the dynamic behavior of the PBGA assembly prototype is developed by using finite element method. Comparison between the experimental results and simulation can illustrate the validity of the experimental test and finite element modeling each other. Findings – The modal distribution test shows the influence of structure characteristics, materials parameters and fixed‐modes of PBGA assembly board. The changing trends of the dynamic modal characteristics during the dynamic excitation can be obtained with different structure characteristics, materials parameters and fixed‐modes of PBGA assembly. Test shows that the fixed location of the assembly board is the most important factor to influence the first frequency and modal deformation of the assembly board. Higher frequency and smaller deformation can be obtained when there are more constraints in printed circuit board. Research limitations/implications – The numerical model is a compendious model by predigesting structure. The research on more accurate mathematical model of the PBGA assembly prototype is a future work. Practical implications – It can imply the dynamics of PBGA assembly. It builds a basis for future work for design and reliability evaluation of PBGA packaging. Originality/value – This paper provides useful information about the dynamic behavior of PBGA assembly with different structure characteristics, materials parameters and fixed‐modes.
journal article
LitStream Collection
DC magnetron sputter‐deposited tungsten silicide films for microelectronic applications

Jian‐Wei Hoon; Kah‐Yoong Chan; Teck‐Yong Tou

2011 Microelectronics International

doi: 10.1108/13565361111127322

Purpose – The purpose of this paper is to share valuable information about metallization in microelectronic industries by implementing tungsten silicide (WSi) thin film materials. Design/methodology/approach – Direct current plasma magnetron sputtering technique was employed for the WSi film growth. Different sputtering parameters were investigated, and the WSi films were characterized using four‐point probe electrical measurement method. Findings – The experimental results reveal that the sputtering parameters such as deposition pressure and substrate temperature exert significant influence on the electrical properties of the WSi films. Research limitations/implications – By tuning the sputtering parameters, the electrical properties of the WSi films can be optimized and the film resistivity can be reduced significantly. Practical implications – The investigation results presented in this paper are useful information for microelectronic industries in the area of microelectronic devices metallization. Originality/value – The fabrication method described in this paper allows fabricating low‐resistivity WSi films by employing a lower deposition pressure and a lower substrate temperature.
journal article
LitStream Collection
Stabilization network optimization of internally matched GaN HEMTs

W.J. Luo; X.J. Chen; C.Y. Yang; Y.K. Zheng; K. Wei; X.Y. Liu

2011 Microelectronics International

doi: 10.1108/13565361111127331

Purpose – The purpose of this paper is to report on the stabilization network optimization of internally matched GaN high electron mobility transistors (HEMTs). Design/methodology/approach – The effects of the two stabilization networks on the characteristics of the device are discussed, such as the stability, power gain and output power. Findings – With the optimized stabilization network, the internally matched GaN HEMTs with 16‐mm gate width exhibited good stability and delivers a 46 dBm output power with 6.1 dB power gain under the continuous wave condition at 8 GHz. By using the optimized stabilization network, the package process of the large‐scale microwave power device of GaN HEMTs can be simplified. Originality/value – This paper provides useful information for the internally matched GaN HEMTs.
journal article
LitStream Collection
A low‐power CMOS DC‐DC buck converter with on‐chip stacked spiral inductor

Chan‐Soo Lee; Ho‐Yong Choi; Yeong‐Seuk Kim; Nam‐Soo Kim

2011 Microelectronics International

doi: 10.1108/13565361111127340

Purpose – The purpose of this paper is to present a fully integrated power converter. A stacked spiral inductor is applied in a voltage‐mode CMOS DC‐DC converter for the chip miniaturization and low‐power operation. Design/methodology/approach – The three‐layer spiral inductor is simulated with an equivalent circuit and applied to the DC‐DC converter. The DC‐DC buck converter has been fabricated with a standard 0.35 μ m CMOS process. The power converter is measured in both experiment and simulation in terms of frequency and electrical characteristics. Findings – Experimental results show that the converter with the stacked spiral inductor operates properly with the inductance of 7.6 nH and mW power range. The measured inductance of the stacked spiral inductor is found to be almost half of the circuit designed value because of the parasitic resistances and capacitances in the spiral inductor. Originality/value – This paper first introduces the application of the integrated stacked spiral inductor in DC‐DC buck converter for display driver circuit, which requires a low‐power operation. It also shows the fully integrated DC‐DC converter for chip miniaturization.
journal article
LitStream Collection
X‐ray diffraction studies of Al x Ga 1− x N (0≤ x ≤1) ternary alloys grown on sapphire substrate

Ng Sha Shiong; Ching Chin Guan; Zainuriah Hassan; Haslan Abu Hassan

2011 Microelectronics International

doi: 10.1108/13565361111127359

Purpose – The purpose of this paper is to report the structural properties of Al x Ga 1− x N (0≤ x ≤1) grown on sapphire substrate by means of X‐ray diffraction (XRD) technique. The main purpose of this work was to investigate the effects of Al( x ) composition to the structural and microstructural properties of Al x Ga 1− x N ternary alloy such as the crystalline quality, crystalline structure and lattice constant c . Design/methodology/approach – Al x Ga 1− x N thin films with wurtzite structure in the composition range of 0≤ x ≤1 are used in this study. The compositions of the samples are calculated using Vegard's law and verified by energy dispersive X‐ray analysis. The samples are then characterized by means of XRD rocking curve (RC) and phase analysis. Findings – Investigation revealed that the full width half maximum (FWHM) of RC increase with the increase x value. This indicates that the crystalline quality of the samples deteriorate with the increase of Al compositions. The best fit of the non‐linear interpolation of the FWHM of the (002) diffraction RC data suggested that a maximum disorder should be expected in this mixed crystals system when the composition x ≈45 percent. Originality/value – This paper provides valuable information on the effect of Al compositions to the structural characteristics of Al x Ga 1− x N alloy system. The availability of information about maximum disorder of Al composition in Al x Ga 1− x N (0≤ x ≤1) alloy system provides useful reference in device fabrications where researchers are able to choose correct alloy composition in order to fabricate good quality devices.
journal article
LitStream Collection
An investigation into the effect of fabrication parameter variation on the characteristics of screen‐printed thick‐film silver/silver chloride reference electrodes

J.K. Atkinson; M. Glanc; P. Boltryk; M. Sophocleous; E. Garcia‐Breijo

2011 Microelectronics International

doi: 10.1108/13565361111127368

Purpose – The purpose of this paper is to show how the fabrication parameters of screen‐printed thick‐film reference electrodes have been experimentally varied and their effect on device characteristics investigated. Design/methodology/approach – The tested devices were fabricated as screen‐printed planar structures consisting of a silver back contact, a silver/silver chloride interfacial layer and a final salt reservoir layer containing potassium chloride. The fabrication parameters varied included deposition method and thickness, salt concentration and binder type used for the final salt reservoir layer. Characterisation was achieved by monitoring the electrode potentials as a function of time following initial immersion in test fluids in order to ascertain initial hydration times, subsequent electrode drift rates and useful lifetime of the electrodes. Additionally, the effect of fabrication parameter variation on electrode stability and their response time in various test media was also investigated. Findings – Results indicate that, although a trade‐off exists between hydration times and drift rate that is dependent on device thickness, the initial salt concentration levels and binder type also have a significant bearing on the practical useful lifetime. Generally speaking, thicker devices take longer to hydrate but have longer useful lifetimes in a given range of chloride environments. However, the electrode stability and response time is also influenced by the type of binder material employed for the final salt reservoir layer. Originality/value – The reported results help to explain better the behaviour of thick‐film reference electrodes and contribute towards the optimisation of their design and fabrication for use in solid‐state chemical sensors.
journal article
LitStream Collection
Response of Ag thick film microstrip straight resonator to perturbation of bulk and thick film Ni (1−x) Cu x Mn 2 O 4 (0≤x≤1) ceramics

R.N. Jadhav; Vijaya Puri

2011 Microelectronics International

doi: 10.1108/13565361111127377

Purpose – The purpose of this paper is to describe the use of copper‐substituted nickel manganite thick film and bulk ceramic superstrate on Ag thick film microstrip straight resonator (MSR), to modify its response and measure complex permittivity as a function of copper. Design/methodology/approach – The glass frit free (fritless) copper‐substituted nickel manganite thick films were formulated on alumina substrate by screen printing technique from the powder synthesized by oxalic precursor method. A comparison has been made between the X band response of Ag thick film MSR due to perturbation of bulk and thick film Ni (1−x) Cu x Mn 2 O 4 (0≤x≤1) ceramic. The shift has been used to measure the permittivity of the ceramic. The dielectric constants obtained by superstrate technique on Ag thick film microstrip component are comparable to those obtained from theoretical calculations. Findings – The resonance frequency of MSR shifts towards lower frequency due to the presence of Ni (1−x) Cu x Mn 2 O 4 (0≤x≤1) ceramic as superstrate. The dielectric constant of bulk and thick film match well with the theoretical values. The dielectric constant increases with copper concentration and shows reduction of power gain of MSR. The peak output (power gain) of MSR due to thick film NiMn 2 O 4 increases by 10.19 per cent with decrease in bandwidth and increase in the quality factor with copper concentration. Originality/value – The superstrate on Ag thick film straight resonator is an efficient tool capable of detecting the composition‐dependent changes in microwave properties of ceramic thick films. These Ni (1−x) Cu x Mn 2 O 4 ceramic being thermistor materials apart from modifying the response can also be used as power sensors providing cost‐effective miniaturization.
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