Microelectronics International

H. Ymeri; B. Nauwelaers; K. Maex

2002 Microelectronics International

doi: 10.1108/13565360210417736

In this paper a method for analysis and modelling of transmission interconnect lines with zero or nonzero thickness on Si–SiO 2 substrate is presented. The analysis is based on semi‐analytical expressions for the frequency‐dependent transmission line admittances. The electromagnetic concept of free charge density is applied. It allows us to obtain integral equations between electric scalar potential and charge density distributions. These equations are solved by the Galerkin procedure of the method of moments. This new model represents narrow and thick line interconnect behaviour over a wide range of frequencies up to 20 GHz. The accuracy of the developed method in this work is validated by comparing with the rigorous simulation data obtained by full‐wave electromagnetic solver and CAD‐oriented equivalent‐circuit modelling approach. The response of the proposed model is shown to be in good agreement with the frequency‐dependent capacitance and conductance characteristics of general coupled multiconductor on‐chip interconnects.

C. Salame; P. Mialhe; J.‐P. Charles; A. Khoury

2002 Microelectronics International

doi: 10.1108/13565360210417745

Developments in neutron detection technology during the past three years are reviewed with special emphasis on application to safety, security, or industrial development.An investigation about the possibility of using N‐channel power MOSFET (metal oxide semiconductor field effect transistor) as a high‐energy neutron sensitive detector is presented here. An empirical expression for neutron fluence detection is derived from the relation between neutron fluence and the evolution of the transistor current measured in the saturation region. This expression is valid for neutron fluence in the range 5×10 9 –1×10 14 n cm −2 .

C.Y. Huang

2002 Microelectronics International

doi: 10.1108/13565360210417754

The underfilling of flip chip components with the encapsulant is based on the principles of capillary flow. A reasonable understanding of capillary flow and an effective estimate of the encapsulant's flow time will help develop a robust process. Factors which may influence the encapsulant's flow rate and its variation include the material type (viscosity, wetting characteristics, silicon particle size, etc.), the aging of the material, the substrate preheat temperature, the chemical composition and texture of the flow surface, standoff height, and the presence of obstructions (solder bumps).A screening experiment through the use of orthogonal array was conducted to determine the factors which would have a significant effect on the encapsulant's flow rate. The screening experiments served as a precursor to subsequent process modeling and the identification of a robust process design. Comprehensive experiments were then performed to further investigate the flow behavior of the underfill materials with realistic properties.

C. Bocking; D.M. Jacobson; A.E.W. Rennie

2002 Microelectronics International

doi: 10.1108/13565360210417763

High silicon Si–Al alloys (50–70 wt% Si) have been developed by Osprey Metals Ltd for use in electronic packaging. They have the advantages of a coefficient of thermal expansion that can be tailored to match ceramics and electronic materials (6–11 ppm/K), low density (<2.8 g/cm 3 ) high thermal conductivity (>100 W/m K). These alloys are also environmentally friendly and are easy to recycle.These Osprey alloys can be fabricated readily into electronic packages by conventional machining with tungsten‐carbide or polycrystalline diamond (PCD) tools and electro‐discharge machining (EDM). Generally more than one of these conventional machining operations is required in the fabrication process. A new and much faster method has been developed which has been used to produce complete electronic packages from plates of Si–Al alloys in a single machining step. In this novel method, known as thin‐shell electroforming (TSE), an accurate model of the package is produced directly from the drawing in wax using a 3D Systems ThermoJet Modeller. This model is mounted into a frame and it is then plated with a thin copper electroform. The wax model is then melted leaving the electroform attached to the frame. This is backfilled with solder and used as the EDM tool for machining the package from a plate of Si–Al alloy.

Yulan Zheng; John Atkinson; Zhige Zhang; Russ Sion

2002 Microelectronics International

doi: 10.1108/13565360210417772

Results are presented from a programme of research aimed at establishing the mechanisms behind the effects of fabrication parameter variation on the performance of thick film strain gauges on steel substrates. The research is aimed at describing the effect on the repeatability of the device characteristics due to different choices of materials, thicknesses of printed layers, firing regimes and geometry of the gauges. In particular the effects of load and temperature on the offset and gain characteristics of a variety of different sensor constructions have been explored. The sensors described here are of a type where the applied strain is parallel to the measured resistance path but orthogonal to the substrate (k 33 ). It has been found that these devices exhibit different characteristics to conventional thick film strain gauges that can help explain the mechanisms affecting gain and offset changes caused by temperature fluctuations and mechanical deformation.