Soldering & Surface Mount Technology

C.C. Tu; M.E. Natishan

2000 Soldering & Surface Mount Technology

doi: 10.1108/09540910010331329

A study was performed to develop a different experimental methodology to assess wettabilities of solders on various printed wiring board (PWB) finishes, based on a modified spreading test in which solder pastes were heated following temperature reflow profiles representative of those used in surface mount technology (SMT) instead of using a fixed rate temperature ramp. Three solder alloys (Sn63‐Pb37, Sn96.5‐Ag3.5, and CASTIN TM : Sn96.2‐Ag2.5‐Cu0.8‐Sb0.5), two fluxes (rosin, mildly activated, RMA, and no‐clean, NC), and seven PWB finishes (Pd, Au/Ni, Ni, Ag, Sn, and organic solderability preservatives: OSP), and bare copper were involved in the study. Better wettabilities were observed in the current study than the results reported in the literature for conventional tests on the same combination of solder alloy, flux, and substrate. The different results in measurement of wettabilities obtained in the current study were attributed to the more adequate heating process allowing flux activation, which reduced reoxidation of solder powders and substrates during the reflow process and thus improved wettabilities of solders. Compared to the results obtained from the popular wetting balance test, the current study demonstrated a more realistic simulation of, and approach to, assessing the wettability of solder for SMT.

Shi‐Wei Ricky Lee; John H. Lau

2000 Soldering & Surface Mount Technology

doi: 10.1108/09540910010312401

A computational parametric study on the solder joint reliability of a plastic ball grid array (PBGA) with solder bumped flip chip (FC) is presented. The basic configuration of the PBGA is 27mm package‐size and 1.27mm ball‐pitch. There were three kinds of ball population: four‐row perimeter grid array with/without thermal balls, and full grid array. A total number of 24 cases, involving various chip sizes, chip thicknesses and substrate thicknesses, were studied. The diagonal cross‐section of the PBGA‐printed circuit board (PCB) assembly was modeled by plane‐strain elements and was subjected to uniform thermal loading. Through mismatch of coefficient of thermal expansion (CTE), and lack of structural compliance, the solder joints were stressed to produce inelastic deformation. The accumulated effective plastic strain was evaluated as an index for the reliability of solder joints. The present study revealed the effects of aforementioned design parameters on the solder joint reliability of FC‐PBGA assemblies. Some peculiar phenomena were identified.

P.T. Vianco; A.C. Kilgo

2000 Soldering & Surface Mount Technology

doi: 10.1108/09540910010331400

Gold coatings are used on connector structures to maintain suitable solderability of the underlying Ni coating layer as well as to prevent surface corrosion during service. However, the likelihood of Au embrittlement in connector solder joints must be minimized by eliminating much of the Au plating from the surfaces using a hot solder dipping or “wicking” procedure prior to final assembly. It was observed that Au removal was most effective by using a double wicking process. Also, a higher soldering temperature improved the efficiency of the Au removal process. A longer soldering time during the wicking process did not appear to offer an appreciable improvement in Au removal. Because the wicking procedure was a manual process, it was found to be operator dependent.

Z.N. Cheng; G.Z. Wang; L. Chen; J. Wilde; K. Becker

2000 Soldering & Surface Mount Technology

doi: 10.1108/09540910010331428

A viscoplastic constitutive model, the Anand model, in which plasticity and creep are unified and described by the same set of flow and evolutionary relations, was applied to represent the inelastic deformation behavior for solder alloys. After conducting creep tests and constant strain rate tests, the material parameters for the Anand model of the Pb‐rich content solder 92.5Pb5Sn2.5Ag were determined from the experimental data using a nonlinear fitting method. The material parameters for 60Sn40Pb, 62Sn36Pb2Ag and 96.5Sn3.5Ag solders were fitted from the conventional model in the literature where plasticity and creep are artificially separated. Model simulations and verifications reveal that there is good agreement between the model predictions and experimental data. Some discussion on this unified model is also presented. This viscoplastic constitutive model for solder alloys possesses some advantages over the separated model. The achieved Anand model has been applied in finite element simulation of stress/strain responses in solder joints for chip component, thin quad flat pack and flip‐chip assembly. The simulation results are in good agreement with the results in the literature. It is concluded that the Anand model could be recommended as a useful material model for solder alloys and can be used in the finite element simulation of solder joint reliability in electronic packaging and surface mount technology.

Jicun Lu; Jianhua Wu; Yih Pin Liew; Thiam Beng Lim; Xiangfu Zong

2000 Soldering & Surface Mount Technology

doi: 10.1108/09540910010331455

The impact of underfill properties on the thermomechanical reliability of flip chip on board (FCOB) assembly is addressed in this paper. FCOB assemblies using three underfill encapsulants were subjected to a thermal cycling test. The performance of the underfill encapsulants was assessed by a statistical analysis of the failure distribution of the FCOB assemblies. The failure modes in the thermal cycling test were found to be solder joint cracks, delamination at underfill/chip passivation interface, and underfill internal cracks. An attempt was made to correlate these failures with underfill properties such as the coefficient of thermal expansion (CTE), modulus, glass transition temperature (Tg), and adhesive strength to the chip. Additionally, nonlinear finite element analysis (FEA) was conducted to verify the experimental results.

Virpi Pennanen; Markku Tammenmaa; Tommi Reinikainen; Jiansen Zhu; Wei Lin

2000 Soldering & Surface Mount Technology

doi: 10.1108/09540910010331509

Owing to the demands of increasing I/O counts and thermal performance BGA (ball grid array) type packaging concepts are rapidly gaining in popularity. Use of various modelling tools is an obvious way to save resources by discarding the most unreliable solutions before wasting testing capacity. A testing procedure was created and then evaluated. Two components were assembled on test boards and the assembled boards were temperature cycled from –40 to +125°C. Parametric 3D FE‐models (finite element) of the components were generated and models were verified. Environmental conditions were added to assess the lifetimes of the assemblies in the targeted environment. Some differences in the TBGAs board level reliability were found. With all contributions of parameters the first failures happened after 1,000 cycles. FE‐modelling combined with accelerated stress testing proved to be an effective tool for test result analysis and for rationalising the test sequences.