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Khalid, Humayun; Obaidat, M.S.
doi: 10.1177/003754979706800402pmid: N/A
This work proposes a new scheme for the replacement of cache lines in computer systems. Performance of the proposed algorithm was tested by conducting simulation experiments. Several simulation models were developed for the cache and neural network paradigms. Our simulation engine was driven by traces from the real world workloads/benchmarks. The proposed strategy uses learning properties of non- estimating type of neural networks to understand the replacement phenomenon and guide the replacement decisions made by the cache controller. Therefore, the strategy was successful in being able to eliminate dead lines from the cache memory more efficiently as compared to the conventional algorithms. We observed from the simulation experiments that a well- designed non-estimating neural network- based replacement policy does provide excellent performance as compared to the overwhelmingly used LRU scheme. The new approach can be applied to the page replacement and prefetching algorithms in virtual memory systems.
Vlassov, Vladimir; Ayani, Rassul; Thorelli, Lars-Erik
doi: 10.1177/003754979706800403pmid: N/A
Multithreaded architectures are widely used for, among other things, hiding long memory latency. In such an architecture, a number of threads are allocated to each Processing Element (PE), and whenever a running thread becomes suspended, the PE switches to the next ready thread. We have developed a simulation platform, MTASim, that can be used to test and evaluate various policies and parameters of a multithreaded computer. The most important features of the MTASim are its flexibility and its ease of use. The MTASim model is based on finite state machines and can be easily modified and expanded. The simulation platform includes an experimental planner, an interface to PVM for the execution of independent experiments in parallel, and an interface to Matlab for processing and displaying results. The MTASim has been used to, among other things, determine the optimal number of threads and to evaluate various prefetching strategies and thread replacement algorithms.
Obeng, Morrison S.; Mahgoub, Imad; Ilyas, Mohammad
doi: 10.1177/003754979706800404pmid: N/A
In this paper, discrete-event simulation is used to evaluate the performance of a cluster-based hypercube architecture running parallel simplex and parallel Gaussian elimination algorithms.The cluster-based hypercube architecture enhances the performance of the nodes of the existing hypercube architecture systems by incorporating in each node, a cluster of n execution processors connected through a small cross-bar switch with n memory modules. The memory modules in each node are shared by the processors within the node.The simulations were developed for both the cluster-based hypercube architecture and the Intel Personal Supercomputer (iPSC/860, a conventional hypercube), and the results obtained were compared. The simulation results show a response time performance improvement of up to 30% in favor of the cluster-based hypercube architecture. We also observe that for increased link delays, the performance gap increases significantly in favor of the cluster-based hypercube architecture.
doi: 10.1177/003754979706800405pmid: N/A
The performance of parallel programs such as fork-join jobs is significantly affected by the choice of policy used to schedule tasks.In this paper we present the results of a simulation study comparing three basic policies that schedule independent tasks in conjunction with resequencing of jobs. A closed queuing network model is considered; the CPU consists of homogeneous and independent processors, each serving its own queue.The simulation results reveal that the performance of the three policies is affected by the resequencing delay. It is shown that over a wide range of system parameters the first-come-first-served policy exhibits better performance than the policy that gives priority to tasks of a job having the smallest number of tasks. It is also shown that the policy that gives priority to the smallest task performs best when there are large variations in the task service times.
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