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Double patterning (DPT) lithography is seen industry-wide as an intermediate solution for the 32- nm node if high index immersion as well as extreme ultraviolet lithography are not ready for a timely release for production. Apart from the obvious drawbacks of the additional exposure, the processing steps, and the resulting reduced throughput, DPT possesses a number of additional technical challenges. This relates to, e.g., exposure tool capability, the actual applied process in the wafer fab, but also to mask performance and metrology. In this work we address the mask performance. To characterize the mask performance in an actual DPT process, conventional mask parameters need to be re-evaluated. Furthermore, new parameters might be more suitable to describe mask capability. This refers to, e.g., reticle to reticle overlay, but also to CD differences between masks of a DPT reticle set. For the 32- nm node, a DPT target of reticle to reticle induced overlay of 6 nm , 3ॣ at mask level, was recently proposed. We report on the performance of a two-reticle set based on a design developed to study the impact of global and local mask placement errors on double patterning using a dual-line process. In a first step we focus on reticle to reticle overlay based on conventional mask metrology. The overlay between two masks evaluated for standard wafer overlay targets is compared with measurements on actual resolution structures, contributions of displacements on different spatial scales are discussed, and mask to mask CD variations are addressed. In a second step, we compare reticle data with experimental intrafield overlay data obtained from wafers on an ASML XT:1700i using the IMEC dual-line double patterning process. Reticle to reticle overlay contribution is studied on the wafers for both standard overlay targets and dedicated DPT features. The results of this study show that reticle to reticle overlay based on conventional single mask registration measurements can be used to qualify the mask overlay performance. It is shown that the overlay contribution from the reticles is smaller than 1.5 nm , 3ॣ at wafer scale.
Journal of Micro/Nanolithography, MEMS and MOEMS – SPIE
Published: Jan 1, 2009
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