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Interconnect stress testing (IST) – an overview of its development and capabilities

Interconnect stress testing (IST) – an overview of its development and capabilities Focuses on the development and capabilities of interconnect stress testing (IST), a stress testing method for printed circuit boards (PCBs) that is fast, repeatable and reproducible. IST technology was originally developed in the mid 1980s. Notes that using IST as an electrical test delivers a capability to remove the human factor from the decision making process of product acceptance or rejection and that the technology is emerging as an important test methodology for the assessment of PCB interconnects. IST has the capability to effectively and rapidly quantify the integrity of plated through holes and the unique ability to identify the presence and levels of post separations within a multilayer board. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png Circuit World Emerald Publishing

Interconnect stress testing (IST) – an overview of its development and capabilities

Circuit World , Volume 29 (2): 7 – Jun 1, 2003

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Publisher
Emerald Publishing
Copyright
Copyright © 2003 MCB UP Ltd. All rights reserved.
ISSN
0305-6120
DOI
10.1108/03056120310454961
Publisher site
See Article on Publisher Site

Abstract

Focuses on the development and capabilities of interconnect stress testing (IST), a stress testing method for printed circuit boards (PCBs) that is fast, repeatable and reproducible. IST technology was originally developed in the mid 1980s. Notes that using IST as an electrical test delivers a capability to remove the human factor from the decision making process of product acceptance or rejection and that the technology is emerging as an important test methodology for the assessment of PCB interconnects. IST has the capability to effectively and rapidly quantify the integrity of plated through holes and the unique ability to identify the presence and levels of post separations within a multilayer board.

Journal

Circuit WorldEmerald Publishing

Published: Jun 1, 2003

Keywords: Interconnection; Stress analysis; Printed circuit boards

There are no references for this article.