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Usenet nuggets

Usenet nuggets Usenet Nuggets Mark Thorson mmm@cup.portal.com This column consists of selected traffic from the c o m p . a r c h newsgroup, a forum for discussion of computer architecture on Usenet--the international network of Unixbased computers. As always, the opinions expressed in this column are the personal views of the authors, and do not necessarily represent the institutions to which they are affiliated. Text which sets the context of a message appears in italics; this is usually text the author has quoted from earlier Usenet traffic. The code-like expressions below the authors' names are their addresses on Usenet. recap the earlier discussions on the net: To a) If you have a barrel with N slots, then any single thread runs at approximately 1/N of the speed that it might if the thread owned the whole CPU. b) Each thread needs (for sure) its own set of: PC Integer & FP registers Privileged state registers c) Either each thread has its own MMU and cache---or it shares them with other threads. d) All of this likely shares a memory bus, which is likely to be a bottleneck anyway, unless you spend a lot of money. In any case, http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM SIGARCH Computer Architecture News Association for Computing Machinery

Usenet nuggets

Thorson, Mark
ACM SIGARCH Computer Architecture News , Volume 20 (4) – Sep 1, 1992
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Publisher
Association for Computing Machinery
Copyright
Copyright © 1992 by ACM Inc.
ISSN
0163-5964
DOI
10.1145/142880.142896
Publisher site
See Article on Publisher Site

Abstract

Usenet Nuggets Mark Thorson mmm@cup.portal.com This column consists of selected traffic from the c o m p . a r c h newsgroup, a forum for discussion of computer architecture on Usenet--the international network of Unixbased computers. As always, the opinions expressed in this column are the personal views of the authors, and do not necessarily represent the institutions to which they are affiliated. Text which sets the context of a message appears in italics; this is usually text the author has quoted from earlier Usenet traffic. The code-like expressions below the authors' names are their addresses on Usenet. recap the earlier discussions on the net: To a) If you have a barrel with N slots, then any single thread runs at approximately 1/N of the speed that it might if the thread owned the whole CPU. b) Each thread needs (for sure) its own set of: PC Integer & FP registers Privileged state registers c) Either each thread has its own MMU and cache---or it shares them with other threads. d) All of this likely shares a memory bus, which is likely to be a bottleneck anyway, unless you spend a lot of money. In any case,

Journal

ACM SIGARCH Computer Architecture News – Association for Computing Machinery

Published: Sep 1, 1992

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