Usenet Nuggets Mark Thorson mmm@cup.portal.com This column consists of selected traffic from the comp.arch news group, a forum for discussion of computer architecture on Usenet--the international network of Unix-based computers. For this issue of CAN, only one posting was selected. As always, the opinions expressed in this column are the personal views of the author(s), and do not necessarily represent the institutions to which they are affiliated. Text which sets the context of a message appears in italics; this is usually text the author has quoted from earlier Usenet traffic. The code-like expressions below the authors' names are their addresses on Usenet. Mark Thorson Now I am being told by management that we shouldn't re-invent the wheel every time, we should use a standard bus to connect I/0, VGA chips, and processors. And by the way, we could have any combination of 680x0, or i960, 80x86 or DSP processors connected together in a system (loosely connected) in the future. I probably fall into the class of folks that tend to isolate I/O from the processor-memory interconnect (given the rate of performance increase in the processor-memory space, do you really want to put I/O options on the same bus?
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Usenet Nuggets
Thorson, Mark
Follow ACM SIGARCH Computer Architecture News
, Volume 22 (1)
Association for Computing Machinery – Mar 1, 1994
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