We discuss the integration of a trace scheduling optimizer into a retargetable optimizing microcode compiler that handles complex timing relations. The trace scheduler requires no special treatment when retargeting the compiler, being constructed from machine independent algorithms that extract target micro-architecture details from a machine description used by the other compiler processes. We focus on the machine independent basis of the trace scheduler and demonstrate it on a hypothetical micro-architecture.
/lp/association-for-computing-machinery/trace-scheduling-optimization-in-a-retargetable-microcode-compiler-sfV1S532H8