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Journals ACM Journal on Emerging Technologies in... Volume 5 Issue 1

Nanoelectronic devices are considered to be the computational fabrics for the emerging nanocomputing systems due to their ultra-high speed and integration density. However, the imperfect bottom-up self-assembly fabrication leads to excessive defects that have become a barrier for achieving reliable computing. In addition, transient errors continue to be a problem. The massive parallelism rendered by nanoscale integration opens up new opportunities but also poses challenges on how to manage such massive resources for reliable and high-performance computing. In this paper, we propose a nanoarchitecture solution to address these emerging challenges. By using dynamic redundancy allocation, the massive parallelism is exploited to jointly achieve fault (defect/error) tolerance and high performance. Simulation results demonstrate the effectiveness of the proposed technique under a range of fault rates and operating conditions.

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Towards achieving reliable and high-performance nanocomputing via dynamic redundancy allocation

Wang, Shuo; Wang, Lei; Jain, Faquir
ACM Journal on Emerging Technologies in Computing Systems (JETC) , Volume 5 (1)
Association for Computing Machinery – Jan 1, 2009

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