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Towards a Language for the Description (part II ~) of IC chips. Reiner W. Hartenstein Karlsruhe University Introduction This paper is continuing ceding paper as "part II" a paper out of the preceding Ii01) is referenced number of SIGMICRO Newsletter. lines. That pre- (for its title see ref. as "part I" in the following (As in part I Ii01, also in part II some of the ideas are half-baked set of register equivalent.Part delling transfer primitives I particularly (RTP) ideas.) In part I a draft design has been given of a symbolic notation, as well as its block diagramm transfer notations for mo- and a corresponding aimed at the demonstration field, of the use of register constructs known from the software as seen with the eyes of a hardware man. transfer level downwards into the logic Part II of this paper is proposing design between an approach to extend the register level by using the notational RTP tools from part I. By this I mean a downward motion of the border line One purpose of these ideas is a contribution of machine organizations, logic design composed level. to the development of - these two layers of abstraction. notational

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Towards a language for the description of IC chips: (part II)

Hartenstein, Reiner W.
ACM SIGMICRO Newsletter , Volume 4 (3)
Association for Computing MachineryOct 1, 1973

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