The existence of kernel functions for logical wire connections Norman L. Soong Research Department Sperry Univac Blue B e l l , Pa. 19424 I . Introduction In an automated chip design environment, the designer is responsible for w r i t i n g down the functional design and specifying the type of techonology to be used. This is the s t a r t i n g point f o r an automated chip design system. I f the design is too large, then i t is partitioned into smaller designs, so that the reduced design can be processed by the system. The f i r s t phase of such a system is a placement phase. During which the c e l l s or c i r c u i t s are geometrically placed on a chip, often in terms of rows and columes. The next phase is a wiring phase that connects all the nodes of the c i r c u i t s according to the design, e.g. network d e f i n i t i o n . I t consists of two sub-phases, one is the general
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The existence of kernel functions for logical wire connections
Soong, Norman L.
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, Volume 11 (2)
Association for Computing Machinery – Sep 1, 1981
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