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Journals ACM SIGARCH Computer Architecture News Volume 22 Issue 2

Ambiguous memory references have always been one of the main sources of performance bottlenecks. Many papers have addressed this problem using static disambiguation. These methods work extremely well when the memory access pattern is linear and predictable. However they are ineffective when the memory access pattern is nonlinear or when the access pattern cannot be determined statically. For these difficult problems, this paper presents speculative disambiguation, a compilation technique for architectures supporting instruction level parallelism and either speculative execution or conditional execution (or both). This technique produces specialized code at compile time to disambiguate memory references at run time. It is shown that on machines with sufficient resources, the technique will always result in lower execution time. Speculative disambiguation has been implemented for a VLIW architecture with guarded execution. Preliminary results indicate that it can help bridge a significant fraction of the performance gap between a good and a perfect static disambiguator. Occasionally it can outperform the perfect static disambiguator.

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Speculative disambiguation: a compilation technique for dynamic memory disambiguation

Huang, A. S.; Slavenburg, G.; Shen, J. P.
ACM SIGARCH Computer Architecture News , Volume 22 (2)
Association for Computing Machinery – Apr 1, 1994

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