CONFERENCE REPORTS - EDAC-90 Report on EDAC 1990 Neerav Berry LSI Logic Corporation 1551 McCarthy Blvd., MS E-192 Milpitas, CA 95035 I would like to thank SIGDA for providing me a grant to attend the first European Design Automation Conference (EDAC) in Glasgow, Scotland, March 12-15, 1990. A large percentage of the attendees where from Europe, though several other countries were represented. The U.S. accounted for 15% of the total attendance. There were 120 technical papers that covered most aspects of electronic design automation. It was heartening to learn that some excellent work in this field is being done by the universities and the industry in Europe. My primary interest is in High Level Synthesis, and I was quite pleased to see the attention it got at this conference. There were two sessions on Scheduling and Allocation, and one on High Level Synthesis of systems. Although there were a number of good papers in these sessions, the ones I found particularly interesting are: 2A.2 "A Branch-and-bound method for optimal transformation of data flow graphs for observing hardware constraints" by W. Grass A branch-and-bound method is proposed to produce a data path from a given behavioral description while observing hardware constraints and maximizing the speed. The method starts with a maximal parallel flow graph, and modifies it in a way that hardware restrictions are fulfilled for all possible schedules of the new graph. Among the advantages of the technique are: it explores the entire design space; and, any scheduling algorithm can be used for the resulting graph to optimize hardware costs within the constraints. 3A. 1 "A neural net based Self Organizing Scheduling Algorithm" by A. Hemani and A. Postula A scheduling algorithm is presented based on Kohonen's rule for self organization. The algorithm has an inherent hill climbing mechanism, can be given a comprehensive set of constraints and can be implemented on parallel structures. It will be interesting to see extensions of this approach that allows the optimization of registers, busses and multiplexers. SIGDA Newsletter~ vol 20, number 1
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