Report on VLSI Design '91 D. Sarma Computer Science Rutgers University Camden, NJ 08102 The 4th C S I / I E E E S y m p o s i u m on VLSI D e s i g n was h e l d this year in New Delhi from J a n u a r y 4-8, 1991. The s y m p o s i u m was a g r e a t success, and the o r g a n i z e r s must be c o m m e n d e d for the e x c e l l e n t arrangements. Nine t u t o r i a l s were arranged, and the t o p i c s w e r e s e l e c t e d from the two fields, Digital VLSI and A n a l o g VLSI. All the t u t o r i a l s w e r e fully s u b s c r i b e d and v e r y well received. I had the o p p o r t u n i t y of a t t e n d i n g three tutorials, P a r a l l e l CAD S y s t e m s by Dr. P r a t h i m a A g r a w a l and Dr. V. D. Agrawal, D e s i g n for T e s t a b i l i t y by Dr. M e l v i n Breuer, and F a u l t - T o l e r a n t VLSI S y s t e m s by Dr. J a c o b Abraham. The t e c h n i c a l p a p e r s w e r e o r g a n i z e d into f o u r t e e n sessions, and a total of 45 p a p e r s were selected. I a t t e n d e d the s e s s i o n s on M u l t i p r o c e s s i n g for CAD, M o d u l e Generation, D e s i g n for T e s t a b i l i t y , P r o c e s s o r Systems, and VLSI Synthesis. A parallel test p a t t e r n g e n e r a t i o n a l g o r i t h m was p r e s e n t e d in a p a p e r "Parallel Test P a t t e r n G e n e r a t i o n U s i n g B o o l e a n S a t i s f i a b i l i t y " w r i t t e n by V. S i v a r a m s k r i s h n a n , S. C. Seth, and P. Agrawal. Shang E. Tai d i s c u s s e d p a r a l l e l fault s i m u l a t i o n in an Intel h y p e r c u b e in a p a p e r e n t i t l e d " P i p e l i n e d C o n c u r r e n t S i m u l a t i o n on D i s t r i b u t e d - M e m o r y P a r a l l e l Computers", c o a u t h o r e d by D. Bhattacharya. In a p a p e r " P a r t i t i o n i n g and R e o r g a n i z a t i o n of H i e r a r c h i c a l C i r c u i t s for DFT" a u t h o r e d by R. Gupta, R. Srinivasan, and M. A. Breuer, a new c a n o n i c a l p a r t i t i o n i n g of a c i r c u i t into d i s j o i n t s u b c i r c u i t s r e f e r r e d to as c l o u d s and r e g i s t e r s was p r e s e n t e d w i t h an a t t e m p t to p r e s e r v e the user h i e r a r c h y as m u c h as possible. In m o d u l e generation, P. P o e c h m u l l e r and M. G l e s n e r p r e s e n t e d new ideas in the field of m u l t i l e v e l logic o p t i m i z a t i o n for a u t o m a t i c logic m a c r o c e l l s y n t h e s i s in t h e i r paper, "A New A p p r o a c h for M u l t i l e v e l Logic Cell O p t i m i z a t i o n . " A v e n d o r e x h i b i t i o n of VLSI CAD tools by Indian c o m p a n i e s and Indian b r a n c h e s of U.S. c o m p a n i e s like C a d e n c e D e s i g n Systems, G a t e w a y Design Automation, and HP was arranged. The e x h i b i t i o n p r o v i d e d a good insight to p r o g r e s s of c o m m e r c i a l VLSI CAD tool d e v e l o p m e n t in India. I w o u l d like to t h a n k the SIGDA e x e c u t i v e c o m m i t t e e for g i v i n g the o p p o r t u n i t y to a t t e n d the VLSI '91 conference. SIGDA Newsletter, vol 21, number I

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