RATCHET: Real-time Address Trace Compression Hardware for Extended Traces C o l l e e n D. S c h i e b e r a n d Eric E. J o h n s o n Parallel Architecture Research Lab N e w M e x i c o State U n i v e r s i t y The address traces used in computer architecture research are commonly generated using software techniques that introduce time dilations of an order of magnitude or more. Such techniques may also omit classes of memory references that are important for accurate models of computer systems, such as instruction prefetches, operating system references, and interrupt activity. We describe a technique for capturing all classes of references in real time. RATCHET employs trace filtering hardware to reduce the bandwidth and storage requirements that have previously limited the usefulness of hardware-based tracing. In evaluating this technique using the ten SPEC89 benchmark programs running on a Sun-3/60 workstation, we found that a small filter cache achieves compression ratios in the 10-30 range during the startup section of the programs. Traces from the middle sections of the C programs achieved compression ratios of 20-30,
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