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Placement and Floorplanning in Dynamically Reconfigurable FPGAs

Placement and Floorplanning in Dynamically Reconfigurable FPGAs Placement and Floorplanning in Dynamically Recon gurable FPGAs ALESSIO MONTONE Politecnico di Milano MARCO D. SANTAMBROGIO Massachusetts Institute of Technology DONATELLA SCIUTO Politecnico di Milano and SEDA OGRENCI MEMIK Northwestern University The aim of this article is to describe a complete partitioning and ‚oorplanning algorithm tailored for recon gurable architectures deployable on FPGAs and considering communication infrastructure feasibility. This article proposes a novel approach for resource- and recon guration- aware ‚oorplanning. Different from existing approaches, our ‚oorplanning algorithm takes speci c physical constraints such as resource distribution and the granularity of recon guration possible for a given FPGA device into account. Due to the introduction of constraints typical of other problems like partitioning and placement, the proposed approach is named ‚oorplacer in order to underline the great differences with respect to traditional ‚oorplanners. These physical constraints are typically considered at the later placement stage. Different aspects of the problems have been described, focusing particularly on the FPGAs resource heterogeneity and the temporal dimension typical of recon gurable systems. Once the problem is introduced a comparison among related works has been provided and their limits have been pointed out. Experimental results proved the validity of the proposed approach. Categories http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Reconfigurable Technology and Systems (TRETS) Association for Computing Machinery

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References (30)

Publisher
Association for Computing Machinery
Copyright
Copyright © 2010 by ACM Inc.
ISSN
1936-7406
DOI
10.1145/1862648.1862654
Publisher site
See Article on Publisher Site

Abstract

Placement and Floorplanning in Dynamically Recon gurable FPGAs ALESSIO MONTONE Politecnico di Milano MARCO D. SANTAMBROGIO Massachusetts Institute of Technology DONATELLA SCIUTO Politecnico di Milano and SEDA OGRENCI MEMIK Northwestern University The aim of this article is to describe a complete partitioning and ‚oorplanning algorithm tailored for recon gurable architectures deployable on FPGAs and considering communication infrastructure feasibility. This article proposes a novel approach for resource- and recon guration- aware ‚oorplanning. Different from existing approaches, our ‚oorplanning algorithm takes speci c physical constraints such as resource distribution and the granularity of recon guration possible for a given FPGA device into account. Due to the introduction of constraints typical of other problems like partitioning and placement, the proposed approach is named ‚oorplacer in order to underline the great differences with respect to traditional ‚oorplanners. These physical constraints are typically considered at the later placement stage. Different aspects of the problems have been described, focusing particularly on the FPGAs resource heterogeneity and the temporal dimension typical of recon gurable systems. Once the problem is introduced a comparison among related works has been provided and their limits have been pointed out. Experimental results proved the validity of the proposed approach. Categories

Journal

ACM Transactions on Reconfigurable Technology and Systems (TRETS)Association for Computing Machinery

Published: Nov 1, 2010

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