This tutorial is an introduction to performance modeling in the design of integrated circuits (ICs). It assumes no background in either electrical engineering or VLSI design; all relevant concepts and terminology will be introduced. The goal is to give an overview of the role of performance modeling in IC design, the current state of the art, central problems and research challenges. First, the process of IC design will be reviewed. Every design progresses through a series of stages: concept, architecture, implementation and realization. Each level of design manipulates different abstractions and hence is concerned with different measures of design quality. Some principle measures are: speed, silicon area, power consumption and the number of input/output connections. There are several different major design paradigms such as gate array, standard cell and custom design. Each results in different tradeoffs between flexibility, ease of implementation and design quality. This has a fundamental impact on both the design process and the resulting design. Performance considerations enter into IC design at a variety of levels: device, circuit, logic design and architecture. Each requires different performance models, and the designer must make tradeoffs that are qualitatively different at different levels. Circuit level design requires fast and accurate models of logic gate behavior. A circuit's speed, silicon area and power consumption must be accurately estimated. Each of these circuit characteristics can be traded off against the others, and the designer may adjust the tradeoff in order to tune the circuit to the needs of a particular application. Accurate and computationally fast models form the basis for the tools that assist the designer in circuit optimization. Tools exist that accurately predict circuit performance and that automatically optimize circuits. Integrated circuit design is a field still in its infancy. This, coupled with the fact that the underlying technological base has undergone rapid change in recent years, means that performance modeling of IC design is still in its formative stages. Some areas (e.g. device modeling) are more mature and better understood than others (e.g. architectural modeling). Research opportunities are plentiful.
End of preview. The entire article is 3 pages. To view the full-text, please rent this article to continue.
/lp/association-for-computing-machinery/performance-modeling-in-integrated-curcuit-design-tutorial-dLP0zc7mmT
Welcome to DeepDyve! Rent Premier Research Articles and Save Up to 90%
Performance modeling in integrated curcuit design (tutorial)
Hedlund, Kye
Follow ACM SIGMETRICS Performance Evaluation Review
, Volume 14 (1)
Association for Computing Machinery – May 1, 1986
More Info
More Like This Article
View All dataSource[]=actageo&dataSource[]=aspet&dataSource[]=aaos&dataSource[]=aacc&dataSource[]=aacr&dataSource[]=aea&dataSource[]=aip&dataSource[]=ajnr&dataSource[]=ams&dataSource[]=aps_physical&dataSource[]=appi_book&dataSource[]=appi_journal&dataSource[]=apha&dataSource[]=asip&dataSource[]=asm&dataSource[]=asn&dataSource[]=aspb&dataSource[]=avs&dataSource[]=annual_reviews&dataSource[]=arxiv&dataSource[]=acm&dataSource[]=berghahn&dataSource[]=cabi&dataSource[]=clinical_trials&dataSource[]=dailymed&dataSource[]=degruyter&dataSource[]=du_press&dataSource[]=esa&dataSource[]=eu_press&dataSource[]=elsevier&dataSource[]=emerald&dataSource[]=ejtr&dataSource[]=emea&dataSource[]=epo&dataSource[]=faseb&dataSource[]=gsa&dataSource[]=health_affairs&dataSource[]=hindawi&dataSource[]=imanager&dataSource[]=imedpub&dataSource[]=informa_healthcare&dataSource[]=informs&dataSource[]=iop&dataSource[]=iucr&dataSource[]=iospress&dataSource[]=jbjs&dataSource[]=leftcoast&dataSource[]=lu_press&dataSource[]=mesharpe&dataSource[]=mary_ann_liebert&dataSource[]=medline&dataSource[]=mit_press&dataSource[]=nature&dataSource[]=oxford&dataSource[]=pier_professional&dataSource[]=pnas&dataSource[]=portlandpress&dataSource[]=psyc_articles&dataSource[]=psyc_books&dataSource[]=psyc_critiques&dataSource[]=plos_journal&dataSource[]=pubmed_central&dataSource[]=rsna&dataSource[]=rockefeller&dataSource[]=rcn&dataSource[]=ria&dataSource[]=rsc&dataSource[]=sage&dataSource[]=spie&dataSource[]=springer_journal&dataSource[]=springer&dataSource[]=taylor_francis&dataSource[]=aps&dataSource[]=the_scientist&dataSource[]=uc_press&dataSource[]=uspto_abstract&dataSource[]=wiley&dataSource[]=pct
© 2012 DeepDyve, Inc. All rights reserved.
Terms of Service | Privacy Policy
