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Journals ACM SIGARCH Computer Architecture News Volume 25 Issue 4

The architecture described in the following articel is a direct successor of µ-EP-1 (cf. 1) and was developed by the author and Robert Linden (Universität Bonn, FB Informatik). NICE is a 32-bit processor, utilizing a fixed instruction format, a register set of sixteen general purpose registers and sat extremely powerful but simple and easy to use instruction set which is supported by a variety of addressing modes. The smallest direct addressable data item in main memory is the 32-bit machine word thus utilizing a simple addressing scheme for instruction operands.The aim of this design is reflected by the acronym "NICE" which means "NICE is charmingly elegant" (Robert Linden).At the moment NICE contains neither any hardware support for memory management nor floating point instructions, but using the instruction selection scheme described below features like these can be added without changing the overall machine design.

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NICE: an elegant and powerful 32-bit architecture

Ulmann, B.
ACM SIGARCH Computer Architecture News , Volume 25 (4)
Association for Computing Machinery – Sep 1, 1997

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