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Journals ACM SIGARCH Computer Architecture News Volume 33 Issue 5

In this paper, we present a predictive Monte Carlo based performance model for in-order microarchitectures that is validated against the Itanium-2 processor. In such architectures, we find that application specific characteristics such as load carried dependence and prefetching significantly impact performance. We parametrize these effects and use the PIN instrumentation tool to obtain them. We use Monte Carlo sampling techniques to model the processor core, memory hierarchy and application characteristics. These techniques are widely used in physical simulations but their application to computer architecture performance modeling is atypical and the application parameterization used in this work is also believed to be novel. Preliminary results indicate that the model predicts CPI with a high degree of accuracy as validated against real measurements. Unlike detailed cycle accurate simulation which is computationally infeasible for evaluating realistic scientific applications, the proposed Monte Carlo model converges to a prediction in a few seconds. The accuracy of the model given its simplicity is surprising.

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MonteSim: a Monte Carlo performance model for in-order microachitectures

Srinivasan, Ram; Lubeck, Olaf
ACM SIGARCH Computer Architecture News , Volume 33 (5)
Association for Computing Machinery – Dec 1, 2005

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