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Memory Management Support for Tiled Array Organization Gary Newman gnewman @keps.kodak.com Kodak Electronic Printing Systems 164 Lexington Road Billerica, MA 01821-3984 (508) 870-6668 Abstract Organization of two dimensional array data into sub-arrays, sometimes called tiles, has been known to provide better performance than either row or column ordering since the late 1960s. Yet the tiling of arrays is little used today. Although some image processing and graphics memory systems have provided tile access modes, tiling has never been provided in a general purpose way. A novel method is described which adds support for tiled arrays to an otherwise conventional paged memory management unit. The result is that pages contain two dimensional tiles of data rather than one dimensional strips, making tiled virtual memory transparently available to general purpose application programs. Extending this new tiling method, the same benefits are shown to support subarrays with three or more dimensions. Finally, the image memory management unit of the Kodak Prophecy Color Publishing System is shown as an example implementation of tiled virtual memory. Keywords: array address mapping, hardware tiling support, paged memory management, performance, virtual memory system Introduction Large data arrays are widely used in computing applications ranging from simulation
ACM SIGARCH Computer Architecture News – Association for Computing Machinery
Published: Sep 1, 1992
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