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Iterated register coalescing

Iterated register coalescing An important function of any register allocator is to target registers so as to eliminate copy instructions. Graph-coloring register allocation is an elegant approach to this problem. If the source and destination of a move instruction do not interfere, then their nodes can be coalesced in the interference graph. Chaitin's coalescing heuristic could make a graph uncolorable (i.e., introduce spills); Briggs et al. demonstrated a conservative coalescing heuristic that preserves colorability. But Briggs's algorithm is too conservative and leaves too many move instructions in our programs. We show how to interleave coloring reductions with Briggs's coalescing heuristic, leading to an algorithm that is safe but much more aggressive. http://www.deepdyve.com/assets/images/DeepDyve-Logo-lg.png ACM Transactions on Programming Languages and Systems (TOPLAS) Association for Computing Machinery

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References (19)

Publisher
Association for Computing Machinery
Copyright
Copyright © 1996 by ACM Inc.
ISSN
0164-0925
DOI
10.1145/229542.229546
Publisher site
See Article on Publisher Site

Abstract

An important function of any register allocator is to target registers so as to eliminate copy instructions. Graph-coloring register allocation is an elegant approach to this problem. If the source and destination of a move instruction do not interfere, then their nodes can be coalesced in the interference graph. Chaitin's coalescing heuristic could make a graph uncolorable (i.e., introduce spills); Briggs et al. demonstrated a conservative coalescing heuristic that preserves colorability. But Briggs's algorithm is too conservative and leaves too many move instructions in our programs. We show how to interleave coloring reductions with Briggs's coalescing heuristic, leading to an algorithm that is safe but much more aggressive.

Journal

ACM Transactions on Programming Languages and Systems (TOPLAS)Association for Computing Machinery

Published: May 1, 1996

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