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Journals ACM SIGARCH Computer Architecture News Volume 32 Issue 5

Recent studies have suggested that the soft-error rate in microprocessor logic will become a reliability concern by 2010. This paper proposes an efficient error detection technique, called fingerprinting , that detects differences in execution across a dual modular redundant (DMR) processor pair. Fingerprinting summarizes a processor's execution history in a hash-based signature; differences between two mirrored processors are exposed by comparing their fingerprints. Fingerprinting tightly bounds detection latency and greatly reduces the interprocessor communication bandwidth required for checking. This paper presents a study that evaluates fingerprinting against a range of current approaches to error detection. The result of this study shows that fingerprinting is the only error detection mechanism that simultaneously allows high-error coverage, low error detection bandwidth, and high I/O performance.

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Fingerprinting: bounding soft-error detection latency and bandwidth

More Info
  • Publisher Association for Computing Machinery
  • Copyright The ACM Portal is published by the Association for Computing Machinery. Copyright © 2010 ACM, Inc.
  • Subject Reliability, availability, and serviceability
  • ISSN 0163-5964
  • D.O.I. 10.1145/1037947.1024420
  • Publisher site Get PDF  

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