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Journals ACM SIGARCH Computer Architecture News Volume 33 Issue 3

Performance and reliability are both of great importance for microprocessor design. Recently, the replication cache has been proposed to enhance data cache reliability against soft errors. The replication cache is a small fully associative cache to store the replica for every write to the L1 data cache. In addition to enhance data reliability, this paper proposes several cost-effective techniques to improve performance of multiple-issue microprocessors by exploiting the replication cache. The idea is to make use of the replication cache to increase cache bandwidth through dual load and to reduce the L1 data cache miss rate through partial victim caching. Built upon these two schemes, we also propose a hybrid approach to combine the benefits of both dual load and partial victim caching for improving performance further. Our experimental results show that exploiting a replication cache with only 8 entries can improve performance by 13.0% on average without compromising the enhanced data integrity.

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Exploiting the replication cache to improve performance for multiple-issue microprocessors

Allu, Bramha; Zhang, Wei
ACM SIGARCH Computer Architecture News , Volume 33 (3)
Association for Computing Machinery – Jun 1, 2005

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