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- Publisher
- Association for Computing Machinery
- Copyright
- Copyright © 1999 by ACM Inc.
- ISSN
- 0097-8418
- DOI
- 10.1145/384266.299772
- Publisher site
- See Article on Publisher Site
Abstract
The wide-spread use of microprocessor based systems that utilize cache memory to alleviate excessively long DRAM access times introduces a new dimension in the quest to obtain good program performance. To fully exploit the performance potential of these fast processors, programmers must reason about their program's cache performance. Heretofore, this topic has been restricted to the supercomputer, multiprocessor, and academic research community. It is now time to introduce this topic into undergraduate computer science curriculum.As part of the CURIOUS project at Duke University, we are in the initial stages of incorporating cache performance issues into an undergraduate course on software design and implementation. Specifically, we are introducing students to the notion of a cache profile that maps cache behavior to source lines and data structures, and providing a cache profiler that can be used along with other performance debugging tools. In the end, we hope to produce cache conscious programmers that are able to exploit the full performance potential of today's computers.
Journal
ACM SIGCSE Bulletin – Association for Computing Machinery
Published: Mar 1, 1999