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Journals ACM SIGARCH Computer Architecture News Volume 35 Issue 4

As the architectures of computers change, introducing more caches onto multicore chips, even more locality becomes necessary. With the bandwidth between caches and RAM now even more valuable, additional locality from new matrix representations will be important to keep multiple processors busy. The default storage representations of both C and Fortran, row- and column-major respectively, have fundamental deficiencies with many matrix computations. By switching the storage representation from cartesian to block indices, one is able to take better advantage of cache locality at all levels from L1 to paging. This paper only changes storage representation from row-major to Morton-hybrid, and applies it to matrix multiplication. Its purpose is to show that, even with only traditional iterative algorithms, simply changing storage representation offers significant speedups.

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Analyzing block locality in Morton-order and Morton-hybrid matrices

Lorton, K. Patrick; Wise, David S.
ACM SIGARCH Computer Architecture News , Volume 35 (4)
Association for Computing Machinery – Sep 1, 2007

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