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Journals ACM SIGARCH Computer Architecture News Volume 31 Issue 1

Modern processors have various features for latency tolerance such as Hit-under-miss, Out-of-order execution, or Multi-threading. However, many processors must make a precise trap for a TLB miss, because they maintain the TLB with software and cannot distinguish the TLB scarcity from the page fault. It is very important for the application and/or the operating system to avoid the TLB misses as much as possible. Many processors have some super page features that extend the coverage of the TLB significantly, but few operating systems support it. In this paper, we present our implementation of Super Page Kernel for the Linux operating system along with its performance. We implemented Super Page for Alpha, Sparc64 and IA32. With super page kernel, a matrix transpose program runs at least 4 times faster on Alpha, at least 2 times faster on Sparc64, and generates interesting results on IA32 compared to the normal Linux kernel. In addition, we got SPEC CPU numbers that were about 10% higher than normal kernel on Alpha.

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A transparent Linux super page kernel for Alpha, Sparc64 and IA32: reducing TLB misses of applications

Shimizu, Naohiko; Takatori, Ken
ACM SIGARCH Computer Architecture News , Volume 31 (1)
Association for Computing Machinery – Mar 1, 2003

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