A Discussion on Non-Blocking/Lockup-Free Caches Samson Belayneh David R. Kaeli Northeastern University Dept. of Electrical and Computer Engineering 409 Dana Research Center Boston, MA Addendum to previous paper In our previous contribution in the June 1996 issue o f C A N , we presented a discussion on lockup-free caches. T h e article raised a couple of issues with the audience, w h i c h we will attempt to address in this addendum. Our paper used the terms non-blocking cache and lock-up free cache interchangably. This is generally accepted [4]. We then used the t e r m non-blocking L O A D to refer to loads that occur in the presence o f a lockup-free cache. This was a misuse of the term. A n o n - b l o c k i n g load (also referred to as a nonbinding prefetch or F E T C H x instruction [1]) issues a prefetch o f the specified address. If the prefetched address is n o t in the cache, and if a lockup-free cache is not being used, the processor will stall until the cache miss is serviced. N o n - b i n d i n g L O A D s can be used m o r e effectively w h e n c o u p l e d with a lockupfree cache. O n e issue we failed to address in our previous paper was the issue o f a primary versus a secondary miss [3]. A primary miss is a miss to a cache block where there are no outstanding cache misses. A secondary miss is a miss to a block that is currently being fetched into the cache to service a cache miss. Thus, a blocking (non-lock-up-free) cache will only encounter primary misses. In our previous contribution, the fourth sentence in the third p a r a g r a p h on page 21 should have read "...., there can oniy be one in-flight primary miss that can be s u p p o r t e d at a time". We appreciate the constructive c o m m e n t s o f the readers of C A N and h o p e that our article has generated s o m e n e w interest into the design issues related to lock-up-free caches.
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A discussion on non-blocking/lockup-free caches
Belayneh, Samson; Kaeli, David R.
Follow ACM SIGARCH Computer Architecture News
, Volume 24 (4)
Association for Computing Machinery – Sep 1, 1996
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