A Case for User-Level Interrupts Mike Parker School of Computing, University of Utah map@cs.utah.edu 1 The Problem Interrupt overhead for high-speed I/O devices can have a significant negative impact on system performance. Often, the sole purpose of an interrupt from an I/O device is to notify a particular user process about the completion of a request or the arrival of a message from a peer process. General-purpose machines do not provide a mechanism for I/O to directly deliver the notification. The kernel is responsible for acknowledging the interrupt and delivering a notification to the appropriate user process. The act of taking the interrupt, determining the proper destination process, and delivering the notification can be costly in both the number of cycles spent and in the cache overhead incurred. Gigabit ethernet without interrupt coalescing can produce on the order of 5-6 million packets per second for maximum sized packets. Minimum sized packets may produce 10 to 20 times as many interrupts per second. This implies that for a high traffic gigabit ethernet, if the CPU does no other work than processing interrupts, it has somewhere between 10 to 200ns, or 20 to 400 cycles at 2 GHz to handle
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A case for user-level interrupts
Parker, Mike
Follow ACM SIGARCH Computer Architecture News
, Volume 30 (3)
Association for Computing Machinery – Jun 1, 2002
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