The effect of excess gallium vacancies in low-temperature GaAs/AlAs/
GaAs:Si heterostructures
C. Kisielowski
Department of Materials Science and Mineral Engineering, University of California at Berkeley, Berkeley,
California 94720 and Lawrence Berkeley National Laboratory, Berkeley, California 94720
A. R. Calawa
a)
MIT, Lincoln Laboratory, Lexington, Massachusetts 02173
Z. Liliental-Weber
Lawrence Berkeley National Laboratory, Berkeley, California 94720
͑Received 15 January 1996; accepted for publication 5 April 1996͒
This article shows that the presence of low-temperature-grown GaAs ͑LT-GaAs͒ in LT-GaAs/AlAs/
GaAs:Si heterostructures increases the Al/Ga interdiffusion at the heterostructure interfaces. The
interdiffusion enhancement is attributed to the presence of Ga vacancies ͑V
Ga
͒ in the As-rich
LT-GaAs, which diffuses from a supersaturation of V
Ga
frozen-in during sample growth. Chemical
mapping, which distinguishes between the AlAs and GaAs lattices at an atomic scale, is used to
measure the Al concentration gradient in adjacent GaAs:Si layers. A correlation is observed between
the Al/Ga interdiffusion and the gate breakdown voltage in metal-insulator field-effect transistor
structures containing LT-GaAs. © 1996 American Institute of Physics. ͓S0021-8979͑96͒09413-3͔
INTRODUCTION
Self-diffusion processes in III–V compound semicon-
ductor systems, and particularly in GaAs and related ternary
compounds, are the subject of intensive studies.
1
It is now
well established that Ga vacancies mediate diffusion on the
group III sublattice of the zinc-blende structure. The thermo-
dynamic properties of the vacancies are theoretically
understood
2,3
and have been experimentally verified.
4
How-
ever, there is both growing interest and a need to understand
diffusion processes in complex heterostructures involving
materials grown far from thermodynamic equilibrium. Here,
GaAs grown by molecular beam epitaxy ͑MBE͒ at low tem-
peratures ͑LT-GaAs͒ is used as an example. The material
deviates from a stoichiometric composition. Excess arsenic
can be incorporated into concentrations in the range of
10
20
cm
Ϫ3
͑Ref. 5͒ if the layers are grown around 200 °C.
Little is known about the vacancy concentration in these
samples. Although electrical properties of annealed LT-
GaAs are well documented,
6,7
the role of diffusion of non-
equilibrium species of As and V
Ga
and their impact on device
performance remains uncertain.
8,9
In this article we describe experiments that link funda-
mental thermodynamic properties of heterostructures con-
taining LT-GaAs to the performance of devices made from
them. Specifically we conclude that As-rich LT-GaAs con-
tains a supersaturation concentration of Ga vacancies deter-
mined solely by the growth temperature of the LT-GaAs
layers if all other growth parameters are kept constant. We
examine the effect of Ga vacancies supersaturation confined
to LT-GaAs layers at low growth temperatures ͑ϳ200 °C͒,
and how these vacancies affect the interdiffusion of Al and
Ga during overgrowth of AlAs and GaAs:Si layers and dur-
ing annealing at higher temperatures. Chemical imaging
10
is
used to measure the interdiffusion process on an atomic
scale. The movement of V
Ga
into Si-doped GaAs appears to
change the concentration of donor dopants and/or the forma-
tion of Si
Ga
–V
Ga
complexes. This compensation may explain
the fluctuations observed in gate breakdown voltage in LT-
GaAs-based metal-insulator field-effect transistors.
EXPERIMENTAL RESULTS
Figure 1͑a͒ displays a cross-sectional transmission elec-
tron microscopy ͑TEM͒ image of the investigated structure.
Four such samples were examined. The layer sequence and
all other growth parameters ͑LT-GaAs: dϭ200 nm, tϭ12
min, Grϭ1
m/h; AlAs:Grϳ0.4
m/h, T ϭ600 °C, tϳ1 min,
dϭ10 nm; GaAs:Si:Grϭ1
m/h, Tϭ600 °C, tϭ6 min, Si
doping ϭ 6ϫ10
17
cm
Ϫ3
, dϭ100 nm, where Gr is the growth
rate, T is the growth temperature, t is the growth time, and d
is the layer thickness͒ were kept constant except for the
growth temperature of the LT-GaAs layers, which was var-
ied between 170 and 250 °C. After growth, the whole struc-
ture was annealed at 600 °C for 10 min to produce semi-
insulating LT-GaAs layers. Note that the LT- layer closest to
the substrate was actually annealed at 600 °C for about 18
min because of the growth time of the AlAs and GaAs:Si
layers, whereas those layers closest to the surface were an-
nealed for only 10 min.
The layers showed a high structural quality, as observed
in cross-sectional TEM samples. However, plan-view studies
showed significant changes in surface morphology. Island
formation was found on a scale of several
m. The size of
the islands decreased with decreasing growth temperature.
Figure 2 shows islands that were detected in the 190 °C
samples. Occasionally dislocations began to form at 170 °C
in the top LT-GaAs layer. This suggests that the growth tem-
perature was reduced to a point where the surface mobility of
atoms is low, thus causing surface roughening. A further
a͒
Retired.
156 J. Appl. Phys. 80 (1), 1 July 1996 0021-8979/96/80(1)/156/5/$10.00 © 1996 American Institute of Physics